1. Technical Field
The present invention relates generally to a semiconductor integrated circuit and a method of controlling the same, and more particularly, to a semiconductor integrated circuit including a DLL (Delay Locked Loop) circuit and a method of controlling the semiconductor integrated circuit.
2. Related Art
A conventional DLL circuit is included in a semiconductor integrated circuit (IC) device to supply an internal clock signal having an earlier phase than an acquired reference clock signal by converting an external clock signal by a predetermined time. When the internal clock signal that is utilized in the semiconductor IC is delayed through a clock buffer and a transmission line to have a phase difference from the external clock signal, the DLL circuit is used to address a resultant problem in that an output data access time is extended. The DLL circuit controls a phase of the internal clock signal so that it is earlier than the external clock signal by a predetermined time in order to increase a valid data output interval.
Semiconductor integrated circuits implement a power down mode to reduce power consumption and stop power supply to each region inside the semiconductor integrated circuits when entering the power down mode. DLL circuits are also configured to reduce power consumption by stopping an operation when entering the power down mode.
Generally, DLL circuits are provided for a read operation. However, DLL circuits in the related art are configured to stop an operation only when entering the power down mode. Practically, the possibility that the phase of a clock outputted from the DLL circuit changes is high since each circuit region consumes a lot of power in is periods of frequent read operations; however, since a small amount of power is consumed in periods where read operations are intermittently performed, there is smaller possibility that a malfunction may occur due to a change in the phase of a clock. Nevertheless, the DLL circuit continuously performs updates even though the frequency of read operations is low in a semiconductor integrated circuit. That is, although a DLL circuit effectively reduces power consumption in a power down mode, it still consumes power in situations that are substantially similar to the power down mode. These operational characteristics of DLL circuits act as technical limits in reducing power consumption of a semiconductor integrated circuit.